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NVIDIA

Santa Clara, California - United States
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SENIOR LOGIC DESIGN ENGINEER

Description

SENIOR LOGIC DESIGN ENGINEER #1580558 As a member of our logic design team, you will be responsible for a portion of the design of a high performance and low power chip, focusing on such tasks as microarchitectural definition, RTL coding, logic debug, timing closure, supporting verification and implementation, etc. Experience in high performance CPU memory subsystem microarchitecture is a plus. RESPONSIBILITIES - Own and be responsible for delivery of a specific unit on the chip. - Write readable high performance and low power RTL. - Synthesis and Timing closure. - Write design documents. - Work with verification to verify correctness of your unit. - Work with implementation to achieve timing, area, performance and power goals. - Assist with timing closure of super units. MINIMUM REQUIREMENTS - BS or MS in electrical engineering or computer science. - 4+ years of experience, ideally in processor or other related high performance designs. - Verilog experience. - Solid understanding of physical design and VLSI - Top notch communication skills. - Some background in computer architecture is desirable. - Ability to take on large responsibilities and lead a group of engineers. EOE

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