SR POST SILICON VALIDATION ENGINEER

Description

SR POST SILICON VALIDATION ENGINEER #1648962 RESPONSIBILITIES: - Design and develop software techniques to stress new silicon in a lab environment, ensuring functional quality during chip productization. Debug failures, work with HW and SW teams to root cause issues and find solutions or workarounds. - Test Graphics and GPU Compute workloads on discrete and SoC integrated graphics engines. MINIMUM REQUIREMENTS: - BS or MS, EE or CE - 4+ years industry experience in HW functional verification, on processor or graphics chips - Strong programming skills in C - Experience with SW development in a Linux environment - Computer architecture, processor microarchitecture. Familiarity with RISC or CISC level instruction sets, memory ordering and coherency rules. - Location: Santa Clara, CA or Boston, MA DESIRED SKILLS - Strong programming skills in C++ - GPU Compute programming experience on any platform (e.g. CUDA or OpenCL or Direct Shader SW) - Experience with VLSI lab bring-up, especially processor based SOC's - Graphics HW and SW knowledge/experience - Experience with CUDA SW development on Windows or Linux EOE