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NVIDIA

Santa Clara, California - United States
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MEMORY VALIDATION ENGINEER

Description

MEMORY VALIDATION ENGINEER #1543652 Working in NVIDIA's Mobile Hardware System Engineering group, you will be responsible for bring up, validation & debug of future Tegra products. Work as part of a team with logic, circuit design, architects & PCB engineers to ensure successful product development with aggressive product cycles. RESPONSIBILITIES: - Perform DDR2/LPDDR2/DDR3L bring-up and validation on Tegra processors - Perform signal measurements and protocol checking on DRAM interface to make sure designs are meeting JEDEC Spec - Optimize memory register settings for system stability, performance and power on Tegra processors - Perform regression and interoperability testing on DDR2/LPDDR2/DDR3L and all future DRAM technology with Tegra processors across process, voltage and temperatures - Support DRAM vendors in DRAM validation/certification - Debug ASIC and board issues related to logic design & signal integrity - Work closely with Application Engineering teams to resolve customer issues in time critical environment MINIMUM REQUIREMENTS: - BS or MS degree in EE/CE - Good understanding on DDR2/LPDDR2/DDR3 memory signaling/protocol - Good knowledge on PCB design and high speed signal integrity issues - Well versed in the usage of electrical measurement tools such as oscilloscopes and logic analyzer - Rudimentary scripting skills (Python & JavaScript). - Detail oriented, reliable, Self-motivated and able to work under pressure EOE

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